High Quality Factor Miniaturized CMOS Transmission Lines Using Cascaded T-Networks for 60 GHz Millimeter Wave Applications

This work presents an on-chip 60 GHz lumped element transmission line (TL) using cascaded T-networks with a high Quality factor. Each T-network consists of a series inductance with a shunt capacitance at its center. We have derived the design equations for this TL configuration and proved that a TL whose electrical length ≥ 60° achieves additional miniaturization when implemented with three or more cascaded T-networks. The inductance is implemented using a straight wire model with no ground below it, while the capacitance is implemented using a parallel plate model with a grounding pedestal. Both configurations guarantee maximum inductance per unit length and capacitance per unit area to further improve the miniaturization level. A quarter wavelength TL with three cascaded T-networks is fabricated as proof of concept. The measured and simulated results of the fabricated TL have good agreement, and the measured quality factor is 17 at 60 GHz.

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Publication Details

Journal
Electronics
Published
2024-09-20
DOI
https://doi.org/10.3390/electronics13183748
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

High Quality Factor Miniaturized CMOS Transmission Lines Using Cascaded T-Networks for 60 GHz Millimeter Wave Applications

Adel Barakat, Ramesh K. Pokharel
Electronics
Radio Frequency Integrated Circuit Design
article

High Quality Factor Miniaturized CMOS Transmission Lines Using Cascaded T-Networks for 60 GHz Millimeter Wave Applications

Adel Barakat, Ramesh K. Pokharel
article en

Abstract

This work presents an on-chip 60 GHz lumped element transmission line (TL) using cascaded T-networks with a high Quality factor. Each T-network consists of a series inductance with a shunt capacitance at its center. We have derived the design equations for this TL configuration and proved that a TL whose electrical length ≥ 60° achieves additional miniaturization when implemented with three or more cascaded T-networks. The inductance is implemented using a straight wire model with no ground below it, while the capacitance is implemented using a parallel plate model with a grounding pedestal. Both configurations guarantee maximum inductance per unit length and capacitance per unit area to further improve the miniaturization level. A quarter wavelength TL with three cascaded T-networks is fabricated as proof of concept. The measured and simulated results of the fabricated TL have good agreement, and the measured quality factor is 17 at 60 GHz.

ElectronicsVol. 13(18)
Kyushu University (JP)
Keysight Technologies, University of Tokyo
Affordable and clean energy
Openalex Percentile: Top 86%
Radio Frequency Integrated Circuit Design
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High Quality Factor Miniaturized CMOS Transmission Lines Using Cascaded T-Networks for 60 GHz Millimeter Wave Applications — Adel Barakat, Ramesh K. Pokharel · Electronics (2024) | TGRS Research Map | TGRS