A Buck Converter Using Auxiliary-Stage With Multiple-Single-Cycle Non-Linear Control (MSCNLC) for Fast Load Transient Response

Recently, digital ICs with high current slewing characteristics and tight supply voltage margin put increasing demand on the supply regulators. In this paper, an augmented DC-DC buck converter consisting of a lower-frequency main converter and a normally-off fast-switching secondary stage operating in parallel is proposed. The main-stage of the converter uses emulated-current-mode hysteretic control. For the auxiliary transient-suppression stage a nonlinear control scheme termed multiple-single-cycle nonlinear control (MSCNLC) is developed. The proposed augmented regulator improves the load transient response without compromising the overall efficiency of the converter, breaking the well-known efficiency vs. dynamic response trade-off. The high power-efficiency main-stage operating at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$F_{sw}=500$ </tex-math></inline-formula> kHz provides the steady-state DC regulation voltage. The auxiliary-stage adopts a small inductor of 100nH and is only activated when load transient events are detected, providing fast load response, minimizing output voltage deviation. The load transient events are detected through an output capacitor charge tracking circuit, which effectively makes the auxiliary-stage a fast Current-Controlled-Current-Source during transient response. The buck converter is designed for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{IN} =3$ </tex-math></inline-formula> V-5.5V, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{OUT} =0.5$ </tex-math></inline-formula> V-1.1V and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I_{LOAD} =0.5$ </tex-math></inline-formula> A-8A. It is fabricated in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu $ </tex-math></inline-formula> m BCD process. The measurement results show that with MSCNLC enabled, the undershoot and overshoot is reduced to 27mV and 58mV during the step-up and step-down response with 2.5A load step by a factor of close to 2, respectively. The recovery time is improved by ~1.7x.