Design and Evaluation of Active High Pass Filter Topologies for Analog Baseband

This paper introduces an innovative low-power, low-noise, active high pass filter with cross-coupled, diode-connected load. The filter is designed to function at a cutoff frequency of 300 kHz, aimed at eliminating low-frequency interference, such as spillover, in wireless communication systems. Employing TSMC 65 nm CMOS technology, the proposed filter demonstrates notable performance in simulation. It achieves a robust pass band gain of 27 dB, exhibits good linearity with an IIP3 of 4.475 dBm, and maintains minimal noise with an integrated noise level of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.39 \times 10^{-7} ~\mathrm{V}^2$</tex> over 10 MHz bandwidth. Notably, the filter occupies a compact footprint of 83 µm x 82 µm, indicating its suitability for integration into small-scale circuit designs. Moreover, it showcases significant energy efficiency, consuming only 12.97 µW while operating from a 1 V power supply.

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Publication Details

Published
2024-08-11
DOI
https://doi.org/10.1109/mwscas60917.2024.10658726
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.18
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article

Design and Evaluation of Active High Pass Filter Topologies for Analog Baseband

Abhishek Srivastava, Deeksha
1 citations
Analog and Mixed-Signal Circuit Design
0.18
article

Design and Evaluation of Active High Pass Filter Topologies for Analog Baseband

Abhishek Srivastava, Deeksha
article en
1 citations

Abstract

This paper introduces an innovative low-power, low-noise, active high pass filter with cross-coupled, diode-connected load. The filter is designed to function at a cutoff frequency of 300 kHz, aimed at eliminating low-frequency interference, such as spillover, in wireless communication systems. Employing TSMC 65 nm CMOS technology, the proposed filter demonstrates notable performance in simulation. It achieves a robust pass band gain of 27 dB, exhibits good linearity with an IIP3 of 4.475 dBm, and maintains minimal noise with an integrated noise level of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.39 \times 10^{-7} ~\mathrm{V}^2$</tex> over 10 MHz bandwidth. Notably, the filter occupies a compact footprint of 83 µm x 82 µm, indicating its suitability for integration into small-scale circuit designs. Moreover, it showcases significant energy efficiency, consuming only 12.97 µW while operating from a 1 V power supply.

Indian Institute of Technology Hyderabad (IN)
Openalex Percentile: Top 52%
Analog and Mixed-Signal Circuit Design
0.18
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