A Process and Temperature Compensation Technique for Ring-VCO in Charge-Pump PLL

Voltage-Controlled Oscillator (VCO) is a crucial component of a Phase-Locked Loop (PLL) system. However, the frequency of a typical Ring-Oscillator-based VCO varies by about 2–3 times across its frequency tuning range and process, voltage and temperature (PVT) conditions. The gain of a Ring-VCO is another crucial parameter that is significantly affected by PVT variations, thereby impacting the stability and loop bandwidth of the PLL. This paper describes a compensation technique to minimize variations in Ring-VCO gain across PVT conditions. A Charge-Pump PLL operating at 4 GHz is implemented in a 28nm CMOS process. The gain of the Ring-VCO varies by ±27% across PVT at 4 GHz. This gain variation of Ring-VCO combined with other PVT-dependent blocks of PLL lead to a deviation of ±60% in Loop Bandwidth and ±21 % in Phase-Margin (PM). Process trimming reduces the VCO gain variation to ±25 %. Subsequently, the temperature compensation technique reduces the VCO gain variation by 3 times to ±8 %, over a temperature range <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-40^{\circ}\mathrm{C}$</tex> to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$125^{\circ}\mathrm{C}$</tex>. The resulting variations in Loop Bandwidth and Phase-Margin are reduced to ±34%” and ±l5%” respectively.