A 0.6V, 13nW, 0.0012%/V Line Sensitivity PVT - Invariant Voltage Reference Without Using Resistors and Amplifiers
This paper presents a low-voltage, low-power PVT-invariant voltage reference with excellent line sensitivity for IoT and biomedical applications. By applying a bias current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(I_{bias})$</tex> in an NMOS-based composite pair and bias voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(V_{bias})$</tex> at the body of NMOS to get the temperature-compensated voltage reference over a wide temperature range. The proposed design implemented in a 180nm CMOS process gives an output of 141mV which is independent of process, voltage, and temperature. Without trimming, the process variation of the proposed design is 0.988% <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\sigma \mu)$</tex>, and the temperature coefficient of the proposed voltage reference is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$23\text{ppm}/\circ \mathrm{c}$</tex> over a wide temperature range of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-40^{o}\mathrm{C}$</tex> to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$100^{o}\mathrm{C}$</tex>. For a supply voltage ranging from 0.6V <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-2.1\mathbf{V}$</tex> the line sensitivity of the reference is 0.0012%N. The simulated results show that the proposed voltage reference could operate on a minimum supply of 0. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$6\mathrm{V}$</tex>. and the power supply rejection ratio at 1-Hz is -85dB. The area occupied by the total circuit is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.0085\text{mm}^{2}$</tex>, while the total power consumption of the design is 13n W at the typical corner of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$27^{o}\mathrm{C}$</tex> and 0.6V supply.
Authors
- Khanh M Le
- Zia Abbas (ORCID: https://orcid.org/0000-0002-3747-3640)
- Chetan Mittal
- Jalluri Ramgopal
Institutions
- Analog Devices (United States) (US)
- International Institute of Information Technology, Hyderabad (IN)
Publication Details
- Published
- 2024-08-11
- DOI
- https://doi.org/10.1109/mwscas60917.2024.10658664
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00