Real-Time Cell Viability Measurements Using Lab-on-CMOS-Capacitance Sensor Array

We report advances in packaging and testing for existing Complementary Metal Oxide Semiconductor (CMOS) chips that extend their longevity and reusability, thus increasing their effectiveness in monitoring cell viability and facilitating concurrent visual inspection. We created several Printed Circuit Board (PCB) designs aimed at mitigating packaging failures while facilitating data collection using a microcontroller ensuring the creation of a reliable and replaceable cell viability measurement device. Using 3D Modeling software and programming Field Programmable Gate Arrays (FPGA), we developed a rapidly interchangeable test platform and established a data readout system. These advancements notably enhance research efficiency and data quality by minimizing downtime and improving the correlation of capacitance measurements with direct visual observations of cell behavior.