Design and Optimization of Robust Process Monitors
This paper presents a new approach to efficient process monitor (PMON) design. It focuses on robust process tracking of PMOS and NMOS devices while minimizing the effects of external factors such as die temperature variations and local supply voltage changes. The proposed design method introduces a comprehensive set of PMON libraries tailored for the specific device types provided by a target technology node. Central to this method is a novel design automation routine based on Zero Temperature Coefficient (ZTC) biasing of a ring oscillator-based PMON. This work demonstrates the effectiveness and scalability of the proposed method across multiple process nodes. The generated PMON structures show a multi-fold improvement in sensitivity for process tracking compared to current state-of-the-art solutions.
Authors
- Koushik De
- Bhartipudi Sahishnavi
- Khanh M Le
- Zia Abbas (ORCID: https://orcid.org/0000-0002-3747-3640)
- Shiva Sharma
Institutions
- Analog Devices (United States) (US)
- International Institute of Information Technology, Hyderabad (IN)
Publication Details
- Published
- 2024-08-11
- DOI
- https://doi.org/10.1109/mwscas60917.2024.10658748
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00