Formal Verification for Secure Processors: A Guide for Computer Architects
As computer architects continually push the limits of microarchitectural performance optimizations, securing hardware against speculative execution attacks feels like a Sisyphean task. This article explores the critical role computer architects can play in advancing hardware security through formal verification.
Authors
- Thomas Bourgeat (ORCID: https://orcid.org/0000-0002-8468-8409)
- Mengjia Yan (ORCID: https://orcid.org/0000-0002-6206-9674)
- Sharad Malik (ORCID: https://orcid.org/0000-0002-0837-5443)
Institutions
- Princeton University (US)
- École Polytechnique Fédérale de Lausanne (CH)
- Massachusetts Institute of Technology (US)
Publication Details
- Journal
- Computer
- Published
- 2024-09-23
- DOI
- https://doi.org/10.1109/mc.2024.3434848
- Primary Topic
- Security and Verification in Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00