Electro-Thermal-Stress Multiphysical Field Coupling Optimization Design for Coaxial Through Silicon Via Array

The traditional design is achieved by the iterative simulation using finite element method (FEM) software and relies on the experts’ experience, so the design parameters cannot be effectively optimized to achieve the high-performance. In this research, based on the backpropagation neural network (BPNN) model and particle swarm optimization with linear decreasing inertia weight (PSO-LDIW) algorithm, an electro-thermal-stress multiphysical field coupling optimization design method for coaxial through silicon via (CTSV) array is provided. The irregular and complex relationship between the parameters (height of CTSV, radius, thickness of SiO2, BCB, and coaxial annular) and indexes is investigated by COMSOL Multiphysics and HFSS software. According to the simulation data of COMSOL and HFSS, the BPNN models are used to express the corresponding relationship between the parameters and indexes of CTSV. According to the desired indexes of CTSV, the multiobjective optimization function is formulated. Then, the PSO-LDIW algorithm is applied to optimize the parameters of CTSV. Finally, the simulation experiment is used to verify the effectiveness of the optimization design strategy. The simulated indexes (−40.28 dB, 366.31 K, 115.21, 74.14, and 23.16 MPa) well agree with the desired ones (−40 dB, 360 K, 110, 70, and 25 MPa), which indicates that the parameters of CTSV can effectively optimized by the developed design method to control the indexes. In addition, the optimized parameters are applied in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times 4$ </tex-math></inline-formula> CTSV array to verify the effectiveness of the developed strategy. Therefore, the developed electro-thermal-stress multiphysical field coupling optimization design method can effectively design a CTSV array for manufacturing high-performance chiplet-based microsystems.