An Area Optimized Power Amplifier for UWB Medical Applications in 65 nm CMOS Technology

This work proposes the design of an optimized area and low group delay (GD) ultra-wideband power amplifier (PA) in 65 nm TSMC CMOS technology. The PA design employs resistive shunt-shunt feedback amplifier topology to provide broad bandwidth characteristic. This topology was also adopted at the amplifier to achieve good input matching, low group delay, low power and high linearity. The measurement results show that the proposed PA design has an average gain of 6.14 dB from 4–10.6 GHz. The PA design achieves excellent phase linearity (i.e., group delay variation) of ±21 ps, consumes only 20 mW power from a 1.6 V supply voltage and occupies only an area of 0.06 mm2. A good output 1-dB compression point OP1 dB of 4.25 dBm was obtained. By using this method, the proposed design has the smallest area, the lowest group delay variation and power among the recently reported UWB CMOS PAs applications.

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Publication Details

Published
2024-08-11
DOI
https://doi.org/10.1109/mwscas60917.2024.10658751
Citations
3
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.63
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article

An Area Optimized Power Amplifier for UWB Medical Applications in 65 nm CMOS Technology

Wilhelmus Van Noije, Bruno Sanches, Ruiz Soriano María
3 citations
Radio Frequency Integrated Circuit Design
0.63
article

An Area Optimized Power Amplifier for UWB Medical Applications in 65 nm CMOS Technology

Wilhelmus Van Noije, Bruno Sanches, Ruiz Soriano María
article en
3 citations

Abstract

This work proposes the design of an optimized area and low group delay (GD) ultra-wideband power amplifier (PA) in 65 nm TSMC CMOS technology. The PA design employs resistive shunt-shunt feedback amplifier topology to provide broad bandwidth characteristic. This topology was also adopted at the amplifier to achieve good input matching, low group delay, low power and high linearity. The measurement results show that the proposed PA design has an average gain of 6.14 dB from 4–10.6 GHz. The PA design achieves excellent phase linearity (i.e., group delay variation) of ±21 ps, consumes only 20 mW power from a 1.6 V supply voltage and occupies only an area of 0.06 mm2. A good output 1-dB compression point OP1 dB of 4.25 dBm was obtained. By using this method, the proposed design has the smallest area, the lowest group delay variation and power among the recently reported UWB CMOS PAs applications.

Universidade de São Paulo (BR)
Affordable and clean energy
Openalex Percentile: Top 31%
Radio Frequency Integrated Circuit Design
0.63
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