A Highly Digital Integrated Switching LDO with Less 1 mV Output Ripple and 1.2 A Load Current

To address the power supply challenges of high performance microprocessors, a highly digitized switching LDO structure has been proposed, enabling LDO operation under low voltage and high load current conditions. The ripple is a significant limiting factor in the development of switching LDO'. Therefore, the proposed LDO incorporates a multi-phase pulsewidth modulation circuit (MPWM) to control the ripple within 1 m V and achieve high precision regulation and tunable active voltage positioning (A VP) function. Additionally, to further improve the transient response of the LDO and expand the range of load current, an additional analog auxiliary loop is designed. Fabricated in SMIC 55-nm CMOS, the proposed switching LDO can operate in the 0.7-1.2 V, and support a maximum load current of 1.2 A. The simulation result shows that the proposed LDO measures a maximum 61 mV overshoot with a 0.6 A load current step with 40-ns edge in high-precision mode. The measured load regulation rate is 0.4 m V / A and maximum output voltage ripple is 0.87 mV.