A 311 nW Integrated Neural Amplifier and Spike Enhancement Filter Achieving 98.99% Spike Detection Sensitivity

In implantable neural monitoring, handling increasing data volumes from numerous channels is a challenge for transmission. A viable solution is on-chip data spike detection. This study introduces a low-power circuit integrating an analog front-end, spike enhancement filter, and detector. The amplifier adopts a two-stage operational transconductance design to both perform linear filtering of the biopotential recordings and convert them into current. The spike enhancement filter is designed as a current-mode analog signal processing circuit, utilizing translinear loops to emulate the underdamped dynamics of a particle in a monostable potential well, implemented via a second-order differential equation. The filter's output, enhanced with spikes, undergoes a spike detector stage employing hard thresholding. This circuitry is designed using TSMC 65nm CMOS technology. Through simulations utilizing the Wave_clus database, the proposed system demonstrates an average spike detection sensitivity of 98.99% while consuming 311 nW when powered by a 1 V supply, with a compact footprint of 0.0348 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{mm}^{2}$</tex>.