Invited Paper: Low Power, Fully-Integrated Flipped Voltage Follower LDO Using Off-State Non-Linear Circuits for Enhanced Transient Performance

We present an output-capacitorless (OCL) flipped voltage follower (FVF) low-dropout regulator(LDO) with enhanced transient performance capable of providing clean output voltage for battery powered systems-on-chip (SoC) applications. We introduce undershoot and overshoot detector circuits which sense LDO output voltage and generate large dynamic current for immediate change of LDO pass device (PD's) gate source voltage during load transient. We implement a novel folded cascode error amplifier with additional turn-around stage to boost large signal slew for fast tracking of reference voltage. The proposed LDO is designed in TSMC 180nm and its performance is validated with simulation results. The LDO is capable of delivering up to 20mA load current and has 1.5V regulated output voltage. Simulation results show that the proposed design improves over/undershoot response by 3.8× when compared with conventional FVF LDO and settles to within 1% accuracy in 20ns for load transient from 0 - 20mA. The proposed structure consumes <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$24meuA$</tex> quiescent current and has a figures of merit (FoM) comparable to state-of-art-structures.