A 14.5 GHz Dual-Core Noise-Circulating CMOS VCO with Tripler Transformer Coupling, Achieving -123.6 dBc/Hz Phase Noise at 1MHz Offset

A low phase noise voltage-controlled oscillator topology is proposed in this paper. Based on three-coil transformer coupling, the oscillator is kept in class-F low noise mode; The coupling of the three-coil transformer forms a noise-circulating structure at the source of the tail current transistor to reduce the noise of the transistor. The VCO is extended from single-core to dual-core to achieve further reduction of phase noise. In addition, transformer three-coil coupling structure is not only used for pMOS tail transistor current control, but also can eliminate the common mode parasitic capacitance of traditional common source structure to avoid common mode oscillation. Based on the standard TSMC 65 nm CMOS process, simulation results show that the phase noise obtained at 1 MHz offset is -123.6 dBc/Hz, and the FoM is 191 dBc/Hz. The core area of the circuit is 0.06 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, and the current consumption is 30.75 mA under the supply voltage of 1.2 V.