A1-11 GHz Balun CMOS LNA Achieving 1.9-dB NF Gain-Error <0.15 dB and Phase-Error < 0.9°
In this paper, we propose a broadband balun low-noise amplifier (LNA), employing a two-stage capacitor cross-coupled common gate (CCCG) and complementary n/pMOS configuration. Based on the traditional common-source(CS) active feedback topology, the two-stage CCCG structure employed reduces the gain and phase errors of the differential output. Additionally, the complementary <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{n}/\text{pMOS}$</tex> configuration is utilized to achieve doubled current efficiency while alleviating the voltage headroom at the output. By using the series peaking technique, the gate-inductor extends the bandwidth of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{s}_{11}$</tex>. After applying these techniques, we design a prototype of the LNA in a standard 65 nm CMOS technology. Simulation results show that within the bandwidth of 1–11 GHz, we achieve a gain of 19.5 dB, a noise figure (NF) of 1.9-2.7 dB. Gain and phase errors are within 0.15 dB and 0.9° while the IIP3 reaches −1.4 dBm. The proposed circuit consumes only 9.7 mW and occupies a core area of only 0.104 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{mm}^{2}$</tex>.
Authors
- Runwu Fan
- Benqing Guo (ORCID: https://orcid.org/0000-0001-5376-4942)
- Jun Chen (ORCID: https://orcid.org/0000-0003-0069-0235)
Institutions
- Huawei Technologies (China) (CN)
- Chengdu University of Information Technology (CN)
Publication Details
- Published
- 2024-08-11
- DOI
- https://doi.org/10.1109/mwscas60917.2024.10658760
- Citations
- 1
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- National Natural Science Foundation of China