Designing and Analyzing Secure SoC Architecture for IoT Devices
As the Internet of Things (IoT) grows, it is more important to guarantee the security bbesides the integrity of data relayed between gadgets in the Internet of Things. SHA-256 algorithm implementation and the inclusion of six General Purpose Input/output (GPIO) pins will be emphasised in particular. Confidentiality is critical in the context of the Industrial Network (IoT), and a System-on-Chip (SOC) structure was developed to satisfy this prerequisite. Because of its robust cryptographic characteristics, the SHA-256 algorithm is a wise strategic choice that guarantees a high degree of data security and integrity in Internet of Things contexts architecture is painstakingly designed to balance power efficiency, effectiveness, and security. Sensitive data transfer is protected by end-to-end encryption thanks to the effortless incorporation of the SHA-256 algorithm. To improve security, the suggested architecture incorporates a SHA-256 encryption block alongside the use of a Zynq Ultra Scale and MPSoC board. The framework integrates a SHA-256 Verilog code for security, uses GPIO for input, and uses I2C to interact with a camera. SRAM, which connects to the SHA-256 module, is connected to registers and an ALU. UART is used to transfer the output for additional processing and analysis. The findings show that the suggested architecture is very compatible with implementation in various Internet of Things applications since it not only offers strong security features but also provides remarkable performance and power economy. The presence of six GPIO pins, boosting the adaptability and usability of the IoT devices, is a unique aspect of the suggested architecture. These GPIO pins have risen functionality, enabling versatility and applicability in a range of environments. It also entails a careful examination of the SOC architecture that has been created, determining how well it strengthens the world of the web of Things' security posture. By fusing the SHA-256 algorithm’s power with the GPIO pins' versatility, we can accelerate the development of secure Internet of Things solutions. The result is a comprehensive architectural tackle that addresses short-term issues in the quickly evolving IoT security ecosystem by balancing hardware versatility with cryptographic resilience. To sum up, it’s a unique SOC architecture created especially to protect Internet of Things devices. The suggested structure solves important security issues and provides seamless connectivity by employing the SHA-256 algorithm and six GPIOs. This makes it the perfect choice for securing the integrity and secrecy of data transmission and IoT device communication.
Authors
- P. Aruna Jeyanthy (ORCID: https://orcid.org/0000-0002-0667-5047)
- Valantina Stephen
- D. Ferlin Deva Shahila (ORCID: https://orcid.org/0009-0006-6218-5516)
- R M Anushia
- Dr.L.Padma Suresh
Institutions
- Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology (IN)
- Saveetha University (IN)
- Kalasalingam Academy of Research and Education (IN)
Publication Details
- Published
- 2024-08-08
- DOI
- https://doi.org/10.1109/iccpct61902.2024.10673314
- Citations
- 3
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 1.47