Hill Climbing for Efficient Spiking Neural Network Acceleration on Neuromorphic Chips

Spiking neural networks (SNNs) emulate biological neurons transmitting information through discrete spikes or pulses of activity. SNNs found extensive application in neuromorphic computing due to efficient cognitive-aware computation, event-driven processing, and robustness to noise and faults. Numerous applications in pattern recognition, sensory processing, computer vision, etc., require complicated networks for enhanced performance and reliability. Realizing such complex SNNs on circuits poses significant challenges due to limitations in scaling up a single array of fully connected neurons within hardware resource and energy constraints. Contemporary neuromorphic chips incorporate small crossbars with time-multiplexed interconnects to address this issue. However, designing robust and efficient neuromorphic systems based on small crossbars is impractical. Therefore, strategic segmentation and positioning of SNNs are crucial for efficiently mapping them onto neuromorphic circuits. This work proposes the hill climbing optimization method to ef-fectively translate SNNs onto neuromorphic circuits, minimizing the spike communication on the interconnect.