Morbius: Platform-Adaptive Hardware Accelerator for Scalable Sequence Motif Discovery

Motif finding is one of the fundamental tools of computational biology. Unfortunately, the benefits of high-performance, low-power acceleration have not been available to this application due to the limited parallelism available within efficient classes of algorithms, such as probabilistic Gibbs sampling. In this work, we present Morbius, which demonstrates the benefits of reconfigurable application-specific hardware acceleration using FPGAs as a solution to the execution time and cost overhead of motif finding. Morbius employs a novel, hardware-optimized data structure called base pair matrix to minimize off-chip data movement, and implements a small number of deep hardware pipelines to achieve high sequential performance. Furthermore, we develop performance and chip space prediction models based on microarchitectural parameters of the accelerator, to facilitate optimal performance on a wide range of accelerators potential users may already have. We compare Morbius on a wide range of FPGA platforms spanning low-profile $250 M.2 FPGA cards to Amazon F1, and demonstrate up to orders of magnitude performance improvements compared to costly server machines, and even higher cost and power efficiency.

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Published
2024-09-16
DOI
https://doi.org/10.1109/e-science62913.2024.10678700
Citations
1
Primary Topic
Time Series Analysis and Forecasting
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article
Field-Weighted Citation Impact
0.35
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article

Morbius: Platform-Adaptive Hardware Accelerator for Scalable Sequence Motif Discovery

Sang-Woo Jun, Se-Min Lim, Esmerald Aliaj
1 citations
Time Series Analysis and Forecasting
0.35
article

Morbius: Platform-Adaptive Hardware Accelerator for Scalable Sequence Motif Discovery

Sang-Woo Jun, Se-Min Lim, Esmerald Aliaj
article en
1 citations

Abstract

Motif finding is one of the fundamental tools of computational biology. Unfortunately, the benefits of high-performance, low-power acceleration have not been available to this application due to the limited parallelism available within efficient classes of algorithms, such as probabilistic Gibbs sampling. In this work, we present Morbius, which demonstrates the benefits of reconfigurable application-specific hardware acceleration using FPGAs as a solution to the execution time and cost overhead of motif finding. Morbius employs a novel, hardware-optimized data structure called base pair matrix to minimize off-chip data movement, and implements a small number of deep hardware pipelines to achieve high sequential performance. Furthermore, we develop performance and chip space prediction models based on microarchitectural parameters of the accelerator, to facilitate optimal performance on a wide range of accelerators potential users may already have. We compare Morbius on a wide range of FPGA platforms spanning low-profile $250 M.2 FPGA cards to Amazon F1, and demonstrate up to orders of magnitude performance improvements compared to costly server machines, and even higher cost and power efficiency.

University of California, Irvine (US)
Openalex Percentile: Top 45%
Time Series Analysis and Forecasting
0.35
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Morbius: Platform-Adaptive Hardware Accelerator for Scalable Sequence Motif Discovery — Sang-Woo Jun, Se-Min Lim, et al. · (2024) | TGRS Research Map | TGRS