AC-TDDB Behavior in 45 nm PDSOI Ultra-Thin Gate Oxide FETs Using SILC Spectroscopy

In this article, an extensive experimental investigation of alternating current (ac)-time-dependent dielectric breakdown (TDDB) in 45 nm technology-based partially depleted silicon-on-insulator (PDSOI) devices is presented. This investigation is performed on ultra-thin oxide devices of two different thicknesses at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$125~^{\circ }$ </tex-math></inline-formula>C. The effect of oxide thickness, device polarity, and ac stress variables are studied in detail. Based on ac frequencies and duty cycles (DTCs), the lifetime at radio frequencies (RFs) up to 1 GHz is predicted using the frequency power law. Almost a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$90\times $ </tex-math></inline-formula> increase in T63 at RF is observed when compared to T63 under direct current (dc) stress in thin NFETs. A comprehensive study using stress-induced leakage current (SILC) spectroscopy in these devices is utilized for studying the breakdown behavior further. The SILC and trap generation rate is a function of frequency, DTC, and gate sense voltage, leading to an improved lifetime under ac stress. Furthermore, temperature-dependent ac TDDB investigations show that a higher trap generation rate at high temperatures leads to accelerated damage leading to shorter time-to-breakdown (TBD).