Novel Integrated Double pMOS SOI-LIGBT With Low Loss and High Short-Circuit Capability

An ultralow loss lateral insulated gate bipolar transistor (LIGBT) with high short-circuit capability is proposed and investigated by simulations. The proposed LIGBT features integrated double pMOS at the cathode side of a conventional LIGBT (Con. LIGBT) (named as IDP LIGBT), wherein pMOS1 is the depletion mode and pMOS2 is the enhancement mode. The potential <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {P}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {N}}$ </tex-math></inline-formula> of cathode P+/N+ regions are self-adaptively modulated by the pMOS2 and pMOS1. In the<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state, the parasitic diode <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${D}1$ </tex-math></inline-formula> (p-well/cathode N+ region) of IDP LIGBT is turned on to enhance the conductivity modulation effect and then achieve a low<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state voltage drop (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula>). During the turning off period, the pMOS2 is turned on before the main gate of LIGBT turning off to extract holes from the p-well quickly and decrease the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {P}}$ </tex-math></inline-formula>, which turns off <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${D}1$ </tex-math></inline-formula> and makes less carriers needed to be extracted. Meanwhile, the pMOS1 channel is self-adaptively narrowed and depleted with the increasing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {AK}}$ </tex-math></inline-formula>, which elevates the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {N}}$ </tex-math></inline-formula> and then reduces the cathode electron injection efficiency. Therefore, the IDP LIGBT achieves an ultrafast switching speed and a low turnoff loss (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula>). In the short-circuit state with high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\text {AK}}$ </tex-math></inline-formula>, the pMOS1 is self-adaptively pinched off to reduce cathode electron injection efficiency and saturation current, so as to achieve a better short-circuit withstanding time (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{\text {SC}}$ </tex-math></inline-formula>). Compared with the MOS resistor (MR) LIGBT, the IDP LIGBT decreases the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula> by 55%/13% at the same <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula> and improves the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{\text {SC}}$ </tex-math></inline-formula> by 56%.

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Journal
IEEE Transactions on Electron Devices
Published
2024-09-16
DOI
https://doi.org/10.1109/ted.2024.3454035
Citations
1
Primary Topic
Silicon Carbide Semiconductor Technologies
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article
Field-Weighted Citation Impact
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article

Novel Integrated Double pMOS SOI-LIGBT With Low Loss and High Short-Circuit Capability

Jinlong Lu, Kaiwei Dai, Xiaorong Luo, Pengchen Zhu et al.
1 citations
IEEE Transactions on Electron Devices
Silicon Carbide Semiconductor Technologies
0.21
article

Novel Integrated Double pMOS SOI-LIGBT With Low Loss and High Short-Circuit Capability

Jinlong Lu, Kaiwei Dai, Xiaorong Luo, Pengchen Zhu, Renkuan Liu, Bo Zhang, Jie Wei, Hui Li, Jialei Tan
article en
1 citations

Abstract

An ultralow loss lateral insulated gate bipolar transistor (LIGBT) with high short-circuit capability is proposed and investigated by simulations. The proposed LIGBT features integrated double pMOS at the cathode side of a conventional LIGBT (Con. LIGBT) (named as IDP LIGBT), wherein pMOS1 is the depletion mode and pMOS2 is the enhancement mode. The potential <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {P}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {N}}$ </tex-math></inline-formula> of cathode P+/N+ regions are self-adaptively modulated by the pMOS2 and pMOS1. In the<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state, the parasitic diode <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${D}1$ </tex-math></inline-formula> (p-well/cathode N+ region) of IDP LIGBT is turned on to enhance the conductivity modulation effect and then achieve a low<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state voltage drop (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula>). During the turning off period, the pMOS2 is turned on before the main gate of LIGBT turning off to extract holes from the p-well quickly and decrease the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {P}}$ </tex-math></inline-formula>, which turns off <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${D}1$ </tex-math></inline-formula> and makes less carriers needed to be extracted. Meanwhile, the pMOS1 channel is self-adaptively narrowed and depleted with the increasing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {AK}}$ </tex-math></inline-formula>, which elevates the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {N}}$ </tex-math></inline-formula> and then reduces the cathode electron injection efficiency. Therefore, the IDP LIGBT achieves an ultrafast switching speed and a low turnoff loss (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula>). In the short-circuit state with high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\text {AK}}$ </tex-math></inline-formula>, the pMOS1 is self-adaptively pinched off to reduce cathode electron injection efficiency and saturation current, so as to achieve a better short-circuit withstanding time (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{\text {SC}}$ </tex-math></inline-formula>). Compared with the MOS resistor (MR) LIGBT, the IDP LIGBT decreases the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula> by 55%/13% at the same <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {on}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}_{\text {off}}$ </tex-math></inline-formula> and improves the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{\text {SC}}$ </tex-math></inline-formula> by 56%.

IEEE Transactions on Electron DevicesVol. 71(11)
University of Electronic Science and Technology of China (CN), Chongqing University (CN), National Engineering Research Center of Electromagnetic Radiation Control Materials (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 48%
Silicon Carbide Semiconductor Technologies
0.21
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