A 40Gb/s Multi-band Wireline Receiver Analog Front-end for 50.4dB Channel Loss Compensation
This paper presents a serial link receiver analog front-end (AFE) designed for high data rate high channel loss application. The continuous-time linear equalizer (CTLE) based AFE features three stages of peaking amplifier and two stages of variable gain amplifier (VGA). All stages in AFE are designed in transconductance-transimpedance (Gm-TIA) structure for bandwidth extension. The AFE can compensate for a 50.4dB insertion loss FR4 channel at a data rate of 40Gb/s without feedforward equalizer (FFE) / decision feedback equalizer (DFE). The total circuit is designed in 28nm CMOS technology and achieves a FoM value of 0.045pJ/bit/dB.
Authors
- Jiangfeng Wu (ORCID: https://orcid.org/0000-0002-4717-0141)
- Wang Cui-xia
- Mingzhe Liu (ORCID: https://orcid.org/0000-0001-7054-997X)
- Yongzhen Chen (ORCID: https://orcid.org/0000-0002-1018-6289)
Institutions
- Tongji University (CN)
Publication Details
- Published
- 2024-08-11
- DOI
- https://doi.org/10.1109/mwscas60917.2024.10658725
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China