Tracking Charge Carrier Paths in Freestanding GaN/AlN Nanowires on Si(111)

Functional and abundant substrate materials are relevant for applying all sophisticated semiconductor-based device components such as nanowire arrays. In the case of GaN nanowires grown by metalorganic vapor phase epitaxy, Si(111) substrates are widely used, together with an AlN interlayer to suppress the well-known Ga-based melt-back-etching. However, the AlN interlayer can degrade the interfacial conductivity of the Si(111) substrate. To reveal the possible impact of this interlayer on the overall electrical performance, an advanced analysis of the electrical behavior with suitable spatial resolution is essential. For the electrical investigation of the nanowire-to-substrate junction, we used a four-point probe measurement setup with sufficiently high spatial resolution. The charge separation behavior of the junction is also demonstrated by an electron beam-induced current mode, while the n-GaN nanowire (NW) core exhibits good electrical conductivity. The charge carrier-selective transport at the NW-to-substrate junction can be attributed to different, local material compositions by two main effects: the reduction of Ga adatoms by shadowing of the lower part of the NW structure by the top part during growth, i.e. the protection of the pedestal footprint from Ga adsorption. Our combination of investigation methods provides direct insight into the nanowire-to-substrate junction and leads to a model of the conductivity channels at the nanowire base. This knowledge is crucial for all future GaN bottom-up grown nanowire structure devices on conductive Si(111) substrates.