Measurement of SET pulse width modulation in CMOS combinational logic by laser-induced fault injection

Digital Single Event Transients (DSETs) induced by high-energy ion hit cause system errors in digital devices. The occurrence frequency of the error depends on the transient pulse width. In addition, as represented by the Propagating-Induced Pulse Broadening (PIPB), the pulse width increases or decreases depending on combinational logic circuit configuration in which the pulse propagates. We propose a new technique (not a simulation) that enables investigating the pulse width modulation in complex circuits, e.g., an adder circuit, without additional test circuits. The proposed technique observed the pulse width broadening of 190 ps with a confidence interval of ±94ps in an 8-bit ripple carry adder fabricated by 0.18µm bulk CMOS technology.

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Publication Details

Journal
IEICE Electronics Express
Published
2024-09-19
DOI
https://doi.org/10.1587/elex.21.20240518
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.00

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article

Measurement of SET pulse width modulation in CMOS combinational logic by laser-induced fault injection

Yuta Tsuchiya, Toru Nakura
IEICE Electronics Express
Integrated Circuits and Semiconductor Failure Analysis
article

Measurement of SET pulse width modulation in CMOS combinational logic by laser-induced fault injection

Yuta Tsuchiya, Toru Nakura
article en

Abstract

Digital Single Event Transients (DSETs) induced by high-energy ion hit cause system errors in digital devices. The occurrence frequency of the error depends on the transient pulse width. In addition, as represented by the Propagating-Induced Pulse Broadening (PIPB), the pulse width increases or decreases depending on combinational logic circuit configuration in which the pulse propagates. We propose a new technique (not a simulation) that enables investigating the pulse width modulation in complex circuits, e.g., an adder circuit, without additional test circuits. The proposed technique observed the pulse width broadening of 190 ps with a confidence interval of ±94ps in an 8-bit ripple carry adder fabricated by 0.18µm bulk CMOS technology.

IEICE Electronics ExpressVol. 21(21)
Japan Aerospace Exploration Agency (JP), Fukuoka University (JP)
University of Tokyo
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Openalex Percentile: Top 87%
Integrated Circuits and Semiconductor Failure Analysis
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Measurement of SET pulse width modulation in CMOS combinational logic by laser-induced fault injection — Yuta Tsuchiya, Toru Nakura · IEICE Electronics Express (2024) | TGRS Research Map | TGRS