Experimentally Exploring the Performance of MOSFET Devices at Deep Cryogenic Temperatures

This study investigates commercially available 180 nm CMOS devices under deep cryogenic conditions, focusing on both short (180 nm) and long (600 nm) channel nMOS devices at temperatures down to 3.2 K. We meticulously measured key parameters including threshold voltage (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>), carrier mobility (μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>), subthreshold slope (SS), on-current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf>), and off-current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf>). Notably, as temperatures decreased, V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf>, and SS values declined, while I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> and μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf> exhibited an increase. A notable observation was the dual Z<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> values for the short channel device, aligning with the significant rise in series resistance post carrier freeze-out at 77 K. Our results provide a foundational understanding for the extraction of compact model parameters, crucial for cryogenic CMOS simulation and circuit design. For short channel devices, V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> evolved from 0.6 V at room temperature to 0.85 V at 3.8 K, carrier mobility increased from 200 to 400 cm2/V2s, and SS improved from 90 mV/dec to 20 mV/dec. Conversely, long channel devices, measured from 113 K to 3.2 K, showed V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> alteration from 0.60 V to 0.64 V, mobility enhancement from 833 to 1220 cm2/V2s, and SS improvement from 30 mV/dec to 10 mV/dec.

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Published
2024-09-02
DOI
https://doi.org/10.1109/sbmicro64348.2024.10673862
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
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article
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article

Experimentally Exploring the Performance of MOSFET Devices at Deep Cryogenic Temperatures

Lucas Stucchi-Zucchi, J. A. Diniz, F. P. Brito, Francisco Rouxinol et al.
1 links
Advancements in Semiconductor Devices and Circuit Design
article

Experimentally Exploring the Performance of MOSFET Devices at Deep Cryogenic Temperatures

Lucas Stucchi-Zucchi, J. A. Diniz, F. P. Brito, Francisco Rouxinol, Marcelo Antonio Pavanello
article en

Abstract

This study investigates commercially available 180 nm CMOS devices under deep cryogenic conditions, focusing on both short (180 nm) and long (600 nm) channel nMOS devices at temperatures down to 3.2 K. We meticulously measured key parameters including threshold voltage (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>), carrier mobility (μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>), subthreshold slope (SS), on-current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf>), and off-current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf>). Notably, as temperatures decreased, V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>, I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf>, and SS values declined, while I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> and μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf> exhibited an increase. A notable observation was the dual Z<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> values for the short channel device, aligning with the significant rise in series resistance post carrier freeze-out at 77 K. Our results provide a foundational understanding for the extraction of compact model parameters, crucial for cryogenic CMOS simulation and circuit design. For short channel devices, V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> evolved from 0.6 V at room temperature to 0.85 V at 3.8 K, carrier mobility increased from 200 to 400 cm2/V2s, and SS improved from 90 mV/dec to 20 mV/dec. Conversely, long channel devices, measured from 113 K to 3.2 K, showed V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> alteration from 0.60 V to 0.64 V, mobility enhancement from 833 to 1220 cm2/V2s, and SS improvement from 30 mV/dec to 10 mV/dec.

Centro Universitário FEI (BR), Universidade Estadual de Campinas (UNICAMP) (BR), Universidade Federal Rural do Semi-Árido (BR)
Openalex Percentile: Top 87%
Advancements in Semiconductor Devices and Circuit Design
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