TCAD-based Performance Evaluation of Dual-Gate UTBB SOI Junctionless ISFET for pH Detection

This work presents a TCAD-based performance evaluation of ultra-thin body and box (UTBB) Silicon-On-Insulator (SOI) junctionless (JL) ion sensitive field effect transistor (ISFET) operating in dual-gate mode. The dual-gate operation allows to take advantage of the increased sensitivity from the SOI capacitance coupling and overcome the Nernstian limit. The threshold voltage (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Th</inf>) and drain current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf>) sensitivities to the pH are analyzed. The V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Th</inf> sensitivity showed gains up to 109.5 and I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</inf> sensitivity increases up to 404.5% compared to single gate mode.