46-nA High-PSR CMOS Buffered Voltage Reference With 1.2–5 V and −40 <sup>◦</sup>C to 125 <sup>◦</sup>C Operating Range
A nanopower, buffered CMOS voltage reference designed to operate across the entire industrial temperature range (from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$- 40~^{\circ }$ </tex-math></inline-formula>C to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$125~^{\circ }$ </tex-math></inline-formula>C) and with an input voltage range from 1.2 to 5 V (automotive applications) is presented. The solution provides 390 mV at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$20~^{\circ }$ </tex-math></inline-formula>C and is implemented in a standard BCD technology featuring 160-nm CMOS devices. It is characterized by an average temperature coefficient of 200 ppm/°C, a line sensitivity (LS) of 0.138%/V, and a power supply rejection of −83 dB at 100 Hz. In addition, the circuit occupies a die area of 0.146 mm2 (with the reference circuit alone covering 0.043 mm2) and maintains a highly stable current consumption of around 45 nA across various process and input voltage conditions (25 nA for the reference circuit alone) while providing a maximum output current of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$630~\mu $ </tex-math></inline-formula>A with a load regulation of 0.016 mV/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>A.
Authors
- Salvatore Pennisi (ORCID: https://orcid.org/0000-0002-5803-484X)
- Chiara Venezia (ORCID: https://orcid.org/0000-0002-6497-3640)
- Alessandro Rizzo (ORCID: https://orcid.org/0000-0002-2386-3146)
- Andrea Ballo (ORCID: https://orcid.org/0000-0003-1192-0104)
- C. Ribellino
- Alfio Dario Grasso (ORCID: https://orcid.org/0000-0002-5707-9683)
Institutions
- University of Catania (IT)
- STMicroelectronics (Italy) (IT)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2024-09-17
- DOI
- https://doi.org/10.1109/tvlsi.2024.3455428
- Citations
- 8
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 1.48