Single-Input Dual-Output Digital Gate Driver IC Automatically Equalizing Drain Current Variations of Two Parallel-Connected SiC MOSFETs

A single-input, dual-output digital gate driver (DGD) IC is proposed, to solve the device characteristic variation problem and the parasitic inductance variation problem on PCBs in two parallel-connected SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s. This article is the first in the world to achieve all of 1) fully integrated two sensor output processing circuits, two DGDs and a controller required to detect and equalize the drain current variation of two parallel-connected SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s on a gate driver IC, 2) equalization of dc and surge components of drain current of each <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> in a closed loop, and 3) demonstration measurements of drain current equalization under a total of four conditions, with and without SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> characteristic variations and with and without parasitic inductance variations.