Characterization and Analysis of Degradation for 1.2-kV Rated SiC Trench MOSFETs Under Repetitive Switching Impulses
The degradation behaviors and mechanism of commercial 1.2-kV rated SiC trench MOSFETs under repetitive switching impulses (RSIs) are comprehensively investigated. Two degradation regions and corresponding degradation behaviors are characterized. Region I is the gate oxide on the channel region. The electrons are trapped in region I under positive gate bias stress, which leads to a slightly positive shift of threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}}$ </tex-math></inline-formula>) and an increment in ON-state resistance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ds-ON}}$ </tex-math></inline-formula>). Region II is the gate oxide at the trench bottom corner. Hot holes are injected into the gate oxide of region II, which leads to a slight decrease in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text {R}_{\text {ds-ON}}$ </tex-math></inline-formula>. The effect is intensified with the increase of thermal stress. Fortunately, the degradation of Region I is not affected by drain-source voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {ds}}$ </tex-math></inline-formula>) stress, even if <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {ds}}$ </tex-math></inline-formula> is up to 80% of the breakdown voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {BR}}$ </tex-math></inline-formula>). A severe gate leakage current was observed when it experienced <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9.0\times 10^{{6}}$ </tex-math></inline-formula> switching impulses under 80% <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 0~{V}_{\text {BR}}$ </tex-math></inline-formula>. Simulated results confirm that the leakage current path is located at the trench bottom corner, induced by a strong electric field. This simultaneously explains the degradation observed in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ds-ON}}$ </tex-math></inline-formula>.
Authors
- Nikhil Bhardwaj
- Michael Jin (ORCID: https://orcid.org/0000-0001-5182-2926)
- Monikuntala Bhattacharya (ORCID: https://orcid.org/0000-0002-0878-0975)
- Hengyu Yu (ORCID: https://orcid.org/0000-0002-3299-8106)
- Anant Agarwal (ORCID: https://orcid.org/0000-0003-0228-8039)
- Shiva Houshmand (ORCID: https://orcid.org/0000-0003-0779-3595)
- Jiashu Qian
- Limeng Shi
Institutions
- The Ohio State University (US)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2024-09-13
- DOI
- https://doi.org/10.1109/ted.2024.3454022
- Citations
- 3
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.63