A Novel Method to Extract Channel Mobility and Parasitic Resistance of 2-D Material MOSFETs

A novel technique, called Fermi-Dirac (FD)-function method, is proposed for extracting channel mobility (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula>) and parasitic resistance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>) of 2-D material (2DM) MOSFETs. The functional form of this method is formalized using three (two) parameters for describing the gate bias-dependent <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>) of a back gate (BG) and top gate (TG) 2-D MOSFET. The method is successfully demonstrated by uniquely extracting these parameters from an antimony (Sb) contacted MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> BG-MOSFET experimental data. Also demonstrated our FD-function method on palladium (Pd) contacted WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> top-gated BG-MOSFET experiments. The extraction accuracy is tested against experiment calibrated TCAD simulations with widely different <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>. These tests show <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula> extraction errors within ±10% and ±8%, respectively. Thus, the proposed FD-function method is highly accurate enables fast extraction and can be easily incorporated in the routine industrial wafer acceptance testing (WAT).

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Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2024-09-13
DOI
https://doi.org/10.1109/ted.2024.3449254
Citations
2
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.42
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article

A Novel Method to Extract Channel Mobility and Parasitic Resistance of 2-D Material MOSFETs

Terry Y.T. Hung, Wen-Chia Wu, Aslan Wei, Iuliana Radu et al.
2 citations
IEEE Transactions on Electron Devices
Advancements in Semiconductor Devices and Circuit Design
0.42
article

A Novel Method to Extract Channel Mobility and Parasitic Resistance of 2-D Material MOSFETs

Terry Y.T. Hung, Wen-Chia Wu, Aslan Wei, Iuliana Radu, Tai-Yuan Wang, D. Mahaveer Sathaiya, Chao-Ching Cheng, Jue-Heng WU, Chung-Cheng Wu, Edward Chen
article en
2 citations

Abstract

A novel technique, called Fermi-Dirac (FD)-function method, is proposed for extracting channel mobility (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula>) and parasitic resistance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>) of 2-D material (2DM) MOSFETs. The functional form of this method is formalized using three (two) parameters for describing the gate bias-dependent <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>) of a back gate (BG) and top gate (TG) 2-D MOSFET. The method is successfully demonstrated by uniquely extracting these parameters from an antimony (Sb) contacted MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> BG-MOSFET experimental data. Also demonstrated our FD-function method on palladium (Pd) contacted WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> top-gated BG-MOSFET experiments. The extraction accuracy is tested against experiment calibrated TCAD simulations with widely different <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula>. These tests show <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {CH}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{P}$ </tex-math></inline-formula> extraction errors within ±10% and ±8%, respectively. Thus, the proposed FD-function method is highly accurate enables fast extraction and can be easily incorporated in the routine industrial wafer acceptance testing (WAT).

IEEE Transactions on Electron DevicesVol. 71(10)
Taiwan Semiconductor Manufacturing Company (Taiwan) (TW)
Openalex Percentile: Top 38%
Advancements in Semiconductor Devices and Circuit Design
0.42
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