The grain boundary and alloy-based system to calculate lattice thermal conductivity in InAs/GaAs multi-layered superlattices

A geometrical approach is constructed to explain the dependence of lattice thermal conductivity (LTC) in InAs/GaAs multi-layered superlattice structures (SLs). The Morelli–Callaway model is applied to calculate the LTC of InAs/GaAs SLs with the assumption of InAs+GaAs thickness as a grain boundary and the total layer thickness as the sample size. Calculations gave a systematically conventional temperature dependence of LTC for nine different samples depending on their number of layers and the InAs and GaAs layer thicknesses having their ratio from 0.13 to 0.295. The dependence of LTC for both peak values at the low and room temperature were examined according to sample size, number of layers and layer thickness ratio. A new relation is examined for the assessment of the grain boundary effects. The best dependence of LTC was obtained by introducing the effects of the layer thickness ratio (InAs/GaAs) and the sample size D in the form [D/(InAs/GaAs)] which gave a systematic mathematical fitting equation.