SambaNova SN40L RDU: Breaking the Barrier of Trillion+ Parameter Scale Gen AI Computing
•Configurable as a systolic array or a SIMD vector unit with M lanes •BF16, FP32, INT32, and INT8 compute data types, configurable storage data types •Arithmetic, Logical, and Bitwise operations •A cross-lane reduction tree (blue) to reduce along the vectorized dimension •Tail stage provides transcendental functions, casting, and stochastic rounding capabilities
Authors
- Raghu Prabhakar
Publication Details
- Published
- 2024-08-25
- DOI
- https://doi.org/10.1109/hcs61935.2024.10664717
- Citations
- 7
- Primary Topic
- Evolutionary Algorithms and Applications
- Type
- article
- Field-Weighted Citation Impact
- 2.43