RISC-V-Based System-on-Chips for IoT Applications

The rapidly growing IoT devices pose challenges to power requirements. Traditional power sources, such as batteries, face many limitations, especially regarding durability. By gathering energy from environmental sources, power harvesting promises the future of a fully connected world. Achieving ultralow-voltage operation for direct powering from harvesters involves specific strategies. This necessity gives rise to circuit solutions characterized by low minimum operating voltages, power consumption in the pW range, and resilience against supply fluctuations. This work provides a combined solution to achieve the low-power, low-area target for pure power-harvesting devices: a minimal resource RISC-V processor with ultra-low power, low leakage ASIC technology. We implemented two serial architecture-based RISC-V SoCs, SERV-32I and SERV-32E, on 65-nm SOTB technology. The SERV-32I is a basic implementation of the RISC-V base specification, while the SER-32E implements the embedded specification with 16 registers truncated in the Register File. The lowest power consumption achieved by SERV-32I and SERV-32E is reported at 34 nW and 9.7 nW with a 0.27 V power supply and frequency of 7 kHz and 3 kHz at VDD <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$=0.27 \text{~V}$</tex>, respectively. The SERV-32E processor's footprint is about <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$28 \%$</tex> smaller than the SERV-32I's, while performance only drops by about <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5 \%$</tex>, with the SERV-32E achieving Dhrystone results of 1.05 DMIPS/MHz and SERV-32I at 1.11 DMIPS/MHz at 50 MHz.