Tri‐Layer Heterostructure Channel of a‐IGZO/a‐ITZO/a‐IGZO Toward Enhancement of Transport and Reliability in Amorphous Oxide Semiconductor Thin Film Transistors

Abstract Thin film transistors (TFTs) based on amorphous oxide semiconductors (AOS) are promising candidates for panel displays. However, the trade‐off between mobility and reliability in AOS‐TFTs hinders their further applications in next‐generation display techniques and newly developed logic and memory circuits. Here, a structural strategy is proposed for the mobility‐reliability trade‐off, via a triple‐layer channel containing a Ga‐free high‐mobility layer (amorphous InSnZnO, a‐ITZO) sandwiched by two Ga‐rich layers (amorphous InGaZnO, a‐IGZO) with higher reliability. Gate‐induced carrier accumulation is verified mainly being energetically confined within the high mobility a‐ITZO layer, at the newly defined a‐ITZO/a‐IGZO interface. Compared to single layer a‐ITZO‐TFTs, triple‐channel a‐IGZO/a‐ITZO/a‐IGZO TFTs (GTG‐TFTs) exhibit outstanding stability and electrical transport performances, with suppressed positive/negative‐bias‐stress voltage shifts from 1/0.3 to 0.1/0.004 V, enhanced field effect mobility from ≈40 to 56 cm 2 V −1 s −1 , and optimized sub‐threshold swing down to 80 mV dec −1 . Further numerical simulations and charge transport characterizations, including magnetotransport and gate‐induced Hall effect, indicate that charge transport in tri‐layer structure is less affected by energetic disorders present at gate insulator interfaces.