Ultra-Low Dark Count Rate SPAD Fully Integrated in a 180 nm High-Voltage CMOS Process

A novel structure of a single-photon avalanche diode (SPAD) fabricated in a commercial <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {180}$ </tex-math></inline-formula> nm high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) process is presented. Device performance in terms of dark count rate (DCR) and photon detection probability (PDP) is compared to a previously published design fabricated as a reference on the same die. We find that the new structure exhibits a DCR of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {0.11}$ </tex-math></inline-formula> Hz/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\mu }$ </tex-math></inline-formula>m<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {^{2}}$ </tex-math></inline-formula> at an excess voltage of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {5}$ </tex-math></inline-formula> V, which is among the lowest ever reported in a foundry CMOS process, and more than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {3}$ </tex-math></inline-formula> times lower with respect to the reference device. Moreover, the new structure shows a PDP/DCR ratio higher by up to a factor of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {4.2}$ </tex-math></inline-formula> compared to the reference device. The reasons underlying the differences in DCR and PDP between the two structures are explained using technology computer-aided design (TCAD) simulations. The novel device is demonstrated as promising for the design of low-cost SPAD array imagers, particularly in low-noise applications.