A comprehensive study of gate-induced drain leakage current and electrical characteristics in nanosheet field-effect transistors due to variation in structural parameters and ambient temperature

Abstract In this paper, two substrate optimization approaches for triple stacked nanosheet field-effect transistors (SNSHFETs), namely the optimization of buried oxide and the selective deposition of punch-through-stopper (PTS) substrate, have been examined, and simulations have been carried out using technology computer-aided software. A comprehensive study of the leakage current and key electrical characteristics ( I ON , V T , subthreshold swing, drain-induced barrier lowering) has also been performed based on variations in temperature from 298 K to 450 K, sheet width, fin pitch, substrate width, and source/drain doping, as well as different substrates. When the ambient temperature of the SNSHFET is varied from 298 K to 450 K, the gate-induced drain leakage (GIDL) current increases and degrades the V T and I ON / I OFF ratio. The GIDL current also increases with increased doping of the source and drain. The impact of ultra-thin body substrate in the SNSHFET is also studied for the reduction in GIDL current and optimization in the performance. It is observed that a reduction in the substrate width and the nanosheet width decreases the GIDL current, while variation in the inter-fin pitch has no significant impact on the GIDL current and other electrical characteristics. The band-to-band tunneling rate and electric field profiles are observed in the channel–drain and gate–substrate overlap regions to understand the physical insights of leakage current in the SNSHFET. This work also clarifies the dependency of the GIDL current on the gate and drain voltage supply, respectively. In addition, how the GIDL current responds to the variation in the source–drain doping and with different PTS doping has been explained. A 3 nm SNSHFET is designed and its electrical and GIDL characteristics are compared with those of novel devices such as the forksheet FET and complementary FET.