SCARLET: A Readout ASIC Bump-Bonded to SDD Array for Large Event Throughput

This work introduces silicon drift detector-ASIC array for large event throughput (SCARLET), a novel readout ASIC designed for integration with monolithic arrays of silicon drift detectors (SDDs) using a bump bonding scheme within a hybrid pixel assembly, suitable for high-rate high-density energy-dispersive X-ray detection systems in synchrotron beamlines or industrial applications. The ASIC, designed in a standard <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.35~\mu $ </tex-math></inline-formula> m CMOS technology, is composed of four parallel readout channels, each integrating the complete pulse processing electronics, from the charge-sensitive amplifier to the analog-to-digital converter (ADC), delivering the signal in a digital format. Specifically, the pulse processing chain features a reset-type CSA with pMOS input stage, a seventh-order semi-Gaussian shaping amplifier, a peak stretcher equipped with peak detector circuit and optimum pile-up rejection (PUR) scheme, and an analog memory to enhance throughput. Each pair of channels is digitized using a priority multiplexing scheme by a 12-bit on-chip successive approximation register (SAR) ADC, providing a digital output at a maximum sampling rate of 5 Ms/s. This enables the allocation of 2.5 MHz to each channel when the multiplexer operates sequentially between them. The layout floorplan is compatible for bump bonding assembly by means of gold-stud bump technique with 2 mm pitch square SDDs. Experimental spectroscopic measurements conducted with the hybrid module yielded a resolution of 240 eV FWHM (24.4 e<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}$ </tex-math></inline-formula> rms) at the shortest filter pulsewidth of 200 ns. A best resolution of 148 eV FWHM (10.3 e<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}$ </tex-math></inline-formula> rms) was achieved at the optimum filter pulsewidth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu $ </tex-math></inline-formula> s. In terms of throughput capability, the ASIC reaches an average output count rate (OCR) of 1.8 Mc/s per channel. When two channels are irradiated simultaneously with an input count rate (ICR) of 4 Mc/s, a maximum count rate of 3.6 Mc/s is measured at the output of the shared ADC operated in priority modality.

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Journal
IEEE Transactions on Nuclear Science
Published
2024-09-06
DOI
https://doi.org/10.1109/tns.2024.3455424
Primary Topic
Radiation Effects in Electronics
Type
article
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article

SCARLET: A Readout ASIC Bump-Bonded to SDD Array for Large Event Throughput

G. Deda, Marco Carminati, F. Ficorella, G. Borghi et al.
IEEE Transactions on Nuclear Science
Radiation Effects in Electronics
article

SCARLET: A Readout ASIC Bump-Bonded to SDD Array for Large Event Throughput

G. Deda, Marco Carminati, F. Ficorella, G. Borghi, Idham Hafizh, G. Pepponi, Carlo Ettore Fiorini
article en

Abstract

This work introduces silicon drift detector-ASIC array for large event throughput (SCARLET), a novel readout ASIC designed for integration with monolithic arrays of silicon drift detectors (SDDs) using a bump bonding scheme within a hybrid pixel assembly, suitable for high-rate high-density energy-dispersive X-ray detection systems in synchrotron beamlines or industrial applications. The ASIC, designed in a standard <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.35~\mu $ </tex-math></inline-formula> m CMOS technology, is composed of four parallel readout channels, each integrating the complete pulse processing electronics, from the charge-sensitive amplifier to the analog-to-digital converter (ADC), delivering the signal in a digital format. Specifically, the pulse processing chain features a reset-type CSA with pMOS input stage, a seventh-order semi-Gaussian shaping amplifier, a peak stretcher equipped with peak detector circuit and optimum pile-up rejection (PUR) scheme, and an analog memory to enhance throughput. Each pair of channels is digitized using a priority multiplexing scheme by a 12-bit on-chip successive approximation register (SAR) ADC, providing a digital output at a maximum sampling rate of 5 Ms/s. This enables the allocation of 2.5 MHz to each channel when the multiplexer operates sequentially between them. The layout floorplan is compatible for bump bonding assembly by means of gold-stud bump technique with 2 mm pitch square SDDs. Experimental spectroscopic measurements conducted with the hybrid module yielded a resolution of 240 eV FWHM (24.4 e<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}$ </tex-math></inline-formula> rms) at the shortest filter pulsewidth of 200 ns. A best resolution of 148 eV FWHM (10.3 e<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}$ </tex-math></inline-formula> rms) was achieved at the optimum filter pulsewidth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu $ </tex-math></inline-formula> s. In terms of throughput capability, the ASIC reaches an average output count rate (OCR) of 1.8 Mc/s per channel. When two channels are irradiated simultaneously with an input count rate (ICR) of 4 Mc/s, a maximum count rate of 3.6 Mc/s is measured at the output of the shared ADC operated in priority modality.

IEEE Transactions on Nuclear ScienceVol. 71(10)
Fondazione Bruno Kessler (IT), Politecnico di Milano (IT)
Openalex Percentile: Top 88%
Radiation Effects in Electronics
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