A Programmable Transimpedance Amplifier for High Capacitive Sensors

In this work, we propose a new transimpedance amplifier (TIA) that can achieve high transimpedance gain without using pseudoresistors or off-chip resistors. Our approach surpasses the noise and gain tradeoff limitation, typical of conventional TIA with resistive feedback. The key idea is to use a transconductor in the TIA negative feedback loop to multiply the impedance and enable programmable high transimpedance amplification. Furthermore, to prevent stability issues while operating at high transimpedance gain and with large input capacitances, the main dominant pole of the system has been located at the input of the TIA. A system comprising the proposed TIA topology, an anti-aliasing filter (AAF), and a 12-bit analog to digital converter has been implemented in a 65-nm Si-CMOS technology to validate the performance of the proposed interface for different types of devices, e.g., indium phosphide p-i-n diodes or electrochemical random access memories. Measurement results reveal that the gain of the proposed TIA can be accurately programmed using ten different GAINTIA configurations ranging from 23 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> to 17 M<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula>. With an input loading capacitance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {IN}} =1$ </tex-math></inline-formula> nF, our TIA achieves a −3-dB bandwidth BW =2.3 kHz when operated at its maximum transimpedance gain. In these conditions, the input referred noise (IRN) current of the TIA integrated over its bandwidth is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${i}_{\text {Irn}} =6.7$ </tex-math></inline-formula> pArms while consuming <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P}_{\text {W}} = 720~\mu $ </tex-math></inline-formula> W of power. With a figure of merit FoM = GAIN<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {TIA}}\cdot \text { BW}\cdot {C}_{\text {IN}}\cdot \text {(}{P}_{\text {W}}\cdot {i}_{\text {Irn}})^{-{1}}$ </tex-math></inline-formula> of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$8.1\times 10^{{3}}$ </tex-math></inline-formula>, the proposed TIA attains the best efficiency among measured state-of-the-art implementations. The proposed TIA topology is ideal for interfacing highly capacitive sensors or to develop current interfaces for the characterization of solid-state devices.