Fail-to-Open Short Circuit Failure Mode of SiC Power MOSFETs: 2-D Thermo-Mechanical Modeling

The short-circuit (SC) performance of Silicon Carbide (SiC) power MOSFETs has been extensively characterized in recent years. During a SC event, a SiC power MOSFET experiences a thermo-mechanical (TM) stress originating from a high temperature change during the SC event and the different coefficients of thermal expansions (CTEs) of source metallization, polySilicon gate, SiC and gate-source insulator. High temperature and TM stress cause the aluminum source metallization to melt, and a crack to form and grow within the gate-source insulation, leading to a short connection between the gate and source terminals typically referred to as fail-to-open (FTO) failure mode. This paper presents a 2-D thermo-mechanical (TM) model of a 2-D MOSFET half-cell for assessing the TM stress in the gate-source insulating layer during SC including the phase change behavior and the temperature-dependent properties of the source metallization. The developed modeling approach allows to assess how different metallization thicknesses and materials affect the TM stress of the gate-source insulation and, hence, enables the development of device design guidelines for improving SC withstand time of SiC power MOSFETs.