Design of Al<sub>2</sub>O<sub>3</sub>/LaAlO<sub>3</sub>/SiO<sub>2</sub> Gate Stack on Various Channel Planes for High-Performance 4H-SiC Trench Power MOSFETs
An Al 2 O 3 /LaAlO 3 /SiO 2 gate stack is designed and implemented on various trench-gate channel planes for high-performance trench power MOSFETs. The designed high-k gate stack achieves a significant enhancement in the gate blocking capability (~1.73X) and maintains a low interface state density ( D it ), in comparison to the SiO 2 gate. Moreover, owing to the implementation of the high-k gate stack, the high-k trench gate MOSFETs conduct a drain current of approximately 1.3 times larger than that of the SiO 2 trench gate MOSFETs on all 24 channel planes at the same overdrive voltage ( V gs - V th ) of 10 V. An analysis of the mobility limiting mechanisms on different channel planes reveals that the highest channel mobility on the (1120) channel plane is primarily due to its largest Coulomb scattering mobility and surface roughness scattering mobility.
Authors
- J.K.O. Sin (ORCID: https://orcid.org/0000-0003-1916-0699)
- Xin Peng (ORCID: https://orcid.org/0000-0002-4204-1260)
- Naoto Fujishima
- Yuichi Onozawa
- Takashi Tsuji
- Yong Liu (ORCID: https://orcid.org/0000-0002-3689-3264)
- Lin Hua Huang
Institutions
- Hong Kong University of Science and Technology (HK)
- Fuji Electric (Japan) (JP)
Publication Details
- Journal
- Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena
- Published
- 2024-08-21
- DOI
- https://doi.org/10.4028/p-9mknrr
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Impact Fund
- Morton Cure Paralysis Fund
- Hong Kong University of Science and Technology