High-Dimensional Yield Analysis Using Sparse Representation for Long-Tailed Distribution

With more advanced technology nodes and stringent robustness requirements, fast, accurate, and universal yield analysis for custom circuits in the early design stage becomes a key bottleneck for manufacturing. In this paper, we propose a sparse representation-based classification framework KSRC using the Log-Euclidean kernel function for the Riemannian manifold, which makes it extremely promising for yield analysis for long-tailed distribution in high-dimensional parameter space. Experiments on SRAM read and write paths validate that the proposed KSRC method outperforms other state-of-the-art approaches in terms of accuracy and efficiency.