(Invited) Redefining Outliers for On-Wafer Electrical Testing
Electrical testing of semiconductor devices is a critical process for ensuring their quality and reliability. Despite the existence of the standard dynamic part average test (DPAT), the detection of outliers that deviate from the spatial trend within a wafer remains challenging because the distinction between good and defective devices is not always clear. This paper presents an overview of two recently proposed outlier detection methods utilizing Gaussian process regression (GPR) in the context of electrical device testing. Experiments on real wafers show that even a simple application of GPR can outperform DPAT in terms of detection performance. The integration of GPR and ensemble learning further facilitates the development of outlier detection methods, enhancing detection performance and reducing computation time.
Authors
- Takashi Satō (ORCID: https://orcid.org/0000-0002-1577-8259)
- Michihiro Shintani (ORCID: https://orcid.org/0000-0002-1163-096X)
Institutions
- Kyoto University (JP)
- Kyoto Institute of Technology (JP)
Publication Details
- Published
- 2024-09-03
- DOI
- https://doi.org/10.1145/3670474.3689186
- Primary Topic
- Industrial Vision Systems and Defect Detection
- Type
- article
- Field-Weighted Citation Impact
- 0.00