LLM Based Physical Verification Runset Generator

The complexity in design rule description and coding is drastically increasing as technology nodes advance. This complexity makes the process of implementing the physical verification (PV) rule checks more time-consuming and susceptible to human error, creating the need to explore alternate methods to improve the runset creation process. The work presented proposes a generative AI solution that uses Large Language Models (LLMs) to interpret rule descriptions and generate design rule check decks (runsets) in a language that a PV tool can interpret. The LLM is fine-tuned with existing design rule manuals and runsets. After post-processing the LLM output, the presented solution can generate rules implementation with up to 97% accuracy. The proposed solution can be used as a runset writer Co-Pilot to help develop the new physical verification runsets.

Authors

Institutions

Publication Details

Published
2024-09-03
DOI
https://doi.org/10.1145/3670474.3685976
Citations
2
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
0.98
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

LLM Based Physical Verification Runset Generator

Srini Arikati, Luis Francisco
2 citations
Embedded Systems Design Techniques
0.98
article

LLM Based Physical Verification Runset Generator

Srini Arikati, Luis Francisco
article en
2 citations

Abstract

The complexity in design rule description and coding is drastically increasing as technology nodes advance. This complexity makes the process of implementing the physical verification (PV) rule checks more time-consuming and susceptible to human error, creating the need to explore alternate methods to improve the runset creation process. The work presented proposes a generative AI solution that uses Large Language Models (LLMs) to interpret rule descriptions and generate design rule check decks (runsets) in a language that a PV tool can interpret. The LLM is fine-tuned with existing design rule manuals and runsets. After post-processing the LLM output, the presented solution can generate rules implementation with up to 97% accuracy. The proposed solution can be used as a runset writer Co-Pilot to help develop the new physical verification runsets.

Synopsys (United States) (US)
Openalex Percentile: Top 25%
Embedded Systems Design Techniques
0.98
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.