Dimension Influence on the Interface Fatigue Characteristics of Three-Dimensional TSV Array: A Fully Coupled Thermal-Electrical-Structural Analysis

As the interconnected structure of 3D chip, through-silicon via undertakes the key functions in energy transmission, mechanical support and signal transmission of 3D chip. With the increasing of TSV interconnection density, the reliability of TSV is becoming increasingly prominent, and the slight variation of TSV dimension may exert severe impact on the fatigue life of the TSV array. In this study, a typical double-layer TSV interconnected 3D array is built to carried out the multi-interface fatigue analysis under thermoelectric structure coupling field, the influence of different dimension of the TSV interconnected array on the fatigue life of various interface and whole thermoelectric circuit are deeply investigated. Results shows that: 1) relatively small or large diameter of TSV-Cu or Bump can effectively improve the fatigue life of Bump-RDL interface. 2) The fatigue life of the top interface between TSV-Cu and SiO2 layer is slightly higher than that of the bottom interface. 3) The optimal dimension combination of TSV interconnected array is highly related with external working environment and own working state. Under the condition of this study, the dimension corresponding to Case 0 (TSV-Cu diameter: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5~\mu $ </tex-math></inline-formula>m, Bump diameter: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10~\mu $ </tex-math></inline-formula>m, Pitch: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$100~\mu $ </tex-math></inline-formula>m, SiO2 layer thickness: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu $ </tex-math></inline-formula>m) is the optimal solution. 4) TSV-Cu diameter and SiO2 thickness have the greatest influence on the fatigue life of TSV array. Relevant results can provide valuable references for locating the weak points of the TSV interconnected array and the subsequent optimization design.

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Publication Details

Journal
IEEE Transactions on Device and Materials Reliability
Published
2024-09-03
DOI
https://doi.org/10.1109/tdmr.2024.3453923
Citations
5
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
1.04

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article

Dimension Influence on the Interface Fatigue Characteristics of Three-Dimensional TSV Array: A Fully Coupled Thermal-Electrical-Structural Analysis

Zhengwei Fan, Kaihong Hou, Yashun Wang, Xun Chen et al.
5 citations
IEEE Transactions on Device and Materials Reliability
3D IC and TSV technologies
1.04
article

Dimension Influence on the Interface Fatigue Characteristics of Three-Dimensional TSV Array: A Fully Coupled Thermal-Electrical-Structural Analysis

Zhengwei Fan, Kaihong Hou, Yashun Wang, Xun Chen, Shufeng Zhang
article en
5 citations

Abstract

As the interconnected structure of 3D chip, through-silicon via undertakes the key functions in energy transmission, mechanical support and signal transmission of 3D chip. With the increasing of TSV interconnection density, the reliability of TSV is becoming increasingly prominent, and the slight variation of TSV dimension may exert severe impact on the fatigue life of the TSV array. In this study, a typical double-layer TSV interconnected 3D array is built to carried out the multi-interface fatigue analysis under thermoelectric structure coupling field, the influence of different dimension of the TSV interconnected array on the fatigue life of various interface and whole thermoelectric circuit are deeply investigated. Results shows that: 1) relatively small or large diameter of TSV-Cu or Bump can effectively improve the fatigue life of Bump-RDL interface. 2) The fatigue life of the top interface between TSV-Cu and SiO2 layer is slightly higher than that of the bottom interface. 3) The optimal dimension combination of TSV interconnected array is highly related with external working environment and own working state. Under the condition of this study, the dimension corresponding to Case 0 (TSV-Cu diameter: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5~\mu $ </tex-math></inline-formula>m, Bump diameter: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10~\mu $ </tex-math></inline-formula>m, Pitch: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$100~\mu $ </tex-math></inline-formula>m, SiO2 layer thickness: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu $ </tex-math></inline-formula>m) is the optimal solution. 4) TSV-Cu diameter and SiO2 thickness have the greatest influence on the fatigue life of TSV array. Relevant results can provide valuable references for locating the weak points of the TSV interconnected array and the subsequent optimization design.

IEEE Transactions on Device and Materials ReliabilityVol. 24(4)
National University of Defense Technology (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 23%
3D IC and TSV technologies
1.04
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