Modeling of the Influence on Effective <i>V</i>TH From Interface States, Short Channel Effects, and Contact Resistance in SiC MOSFETs

The poor interface of silicon carbide (SiC)/SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> combined with the short channel effects (SCEs) and source contact resistance, collectively impacts the effective threshold voltage in SiC MOSFETs. In this work, a physical discrete channel model was proposed to analyze the influence of the combined effects of varying channel lengths, as well as applied drain and gate voltages. The proposed model was validated through TCAD simulation and by the fabricated SiC power MOSFETs. This model was applicable to MOSFETs with both symmetric and asymmetric channels considering various interface state density distributions. The influence of these factors on effective threshold voltage was also discussed considering variations in source contact resistance and channel doping concentration. Through the analysis of the model results, it was found that the interface states significantly impact the effective threshold voltage through different mechanisms while the SCEs are mitigated by the unsaturated interface states.