A High-Efficiency Push–Pull Parallel-Circuit Class-E/F<sub>3</sub> Power Amplifier for Harmonic Suppression
In this article, a high-efficiency push-pull parallel-circuit (PC) Class-E/F3 power amplifier (PA) with a harmonic suppression network for radio frequency identification (RFID) applications is presented. With the double reactance compensation technique (D-RCT), the PA’s design of broadband performance is achieved. In addition, a low-pass (LP) Chebyshev technique is introduced to provide a simple fundamental matching network (MN). Finally, a high-efficiency push-pull PC Class-E/F3 PA is fabricated and measured. The experimental results illustrate that an output power (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P} _{\text {out}}$ </tex-math></inline-formula>) is from 36.83 to 41.84 dBm and 82.35%–91.32% drain efficiency (DE) operating from 5 to 10.5 MHz frequency range, which agrees well with the simulation results.
Authors
- Hengli Zhang (ORCID: https://orcid.org/0000-0003-3922-3263)
- Jianliang Jiang (ORCID: https://orcid.org/0000-0002-1615-5870)
- Heng Lu (ORCID: https://orcid.org/0000-0002-5483-0574)
Institutions
- Beijing Institute of Technology (CN)
Publication Details
- Journal
- IEEE Microwave and Wireless Technology Letters
- Published
- 2024-08-20
- DOI
- https://doi.org/10.1109/lmwt.2024.3442206
- Citations
- 2
- Primary Topic
- Advanced Power Amplifier Design
- Type
- article
- Field-Weighted Citation Impact
- 0.42
Funders
- China Scholarship Council