Study on Electrostatic Discharge Stress Reliability of Thin-Film Transistors With Various Interface and Structure Types

Electrostatic discharge (ESD) poses a significant threat to the reliability of electronic components. Thin-film transistors (TFTs), being the core electronic devices in applications, such as flat-panel displays and sensors, necessitate high reliability to ensure their commercial viability. Interface engineering holds a crucial position in determining the performance of TFTs. Nevertheless, a comprehensive research on the impact of various interfaces on ESD stress reliability in TFTs is still lacking. Here, various interface modifications, source-drain electrode material selections, and device structures are designed to create varying types of interface contacts. In addition, the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i>–<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> characteristics, ESD stress robustness, failure mechanisms, and failure paths of TFTs are analyzed. The findings reveal that the failure behavior of TFTs is attributed to gate-drain breakdown, leading to device short circuits. The changes in electric field distribution between the gate and drain, influenced by various interface types, play a pivotal role in the ESD stress reliability of TFTs. This research provides the theoretical foundation and design concepts for preparing TFTs with superior ESD robustness.