Large‐Scale <i>p</i>‐Type Nonvolatile FGFET Memory Array Based on 2H‐MoTe<sub>2</sub>

Abstract Transition metal dichalcogenides (TMDCs) based large‐scale p ‐type floating‐gate field‐effect transistor (FGFET) memory array has been fabricated for the first time. Chemical‐vapor‐deposition grown seamless co‐planes 2H‐ and 1T′‐MoTe 2 serve as the channel and source/drain electrodes, respectively. High‐κ Al 2 O 3 layers act as the tunneling and blocking layers. Arrayed Pd/Au serves as floating and top gates. The overall performances of the devices are excellent among those of the reported TMDCs‐based FGFET memories. Typical device exhibits large memory windows of ≈11.5 and 2.8 V and on/off ratios of ≈10 4 and 10 3 in gate voltage sweep ranges of ±10 and ±5 V, respectively, with long retention time of more than 10 5 s and good stress endurance of more than 5 × 10 4 programming/erasing cycles. The conductance of the device can be precisely tuned by applying short potentiative and depressive ±5 V voltage pulses. The device yields are 100% and 93% under ±10 and ±5 V, respectively. The whole fabrication process is free from the transfer process and compatible with traditional silicon technology. This work paves the way for the application of TMDCs in large‐scale integrated circuits.

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Publication Details

Journal
Advanced Electronic Materials
Published
2024-08-30
DOI
https://doi.org/10.1002/aelm.202400386
Citations
5
Primary Topic
2D Materials and Applications
Type
article
Field-Weighted Citation Impact
0.59

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article

Large‐Scale p‐Type Nonvolatile FGFET Memory Array Based on 2H‐MoTe2

Lun Dai, Minglai Li, Xionghui Jia, Yanping Li et al.
5 citations
Advanced Electronic Materials
2D Materials and Applications
0.59
article

Large‐Scale p‐Type Nonvolatile FGFET Memory Array Based on 2H‐MoTe2

Lun Dai, Minglai Li, Xionghui Jia, Yanping Li, Jiamin Chen, Wanjin Xu, Zhixuan Cheng
article en
5 citations

Abstract

Abstract Transition metal dichalcogenides (TMDCs) based large‐scale p ‐type floating‐gate field‐effect transistor (FGFET) memory array has been fabricated for the first time. Chemical‐vapor‐deposition grown seamless co‐planes 2H‐ and 1T′‐MoTe 2 serve as the channel and source/drain electrodes, respectively. High‐κ Al 2 O 3 layers act as the tunneling and blocking layers. Arrayed Pd/Au serves as floating and top gates. The overall performances of the devices are excellent among those of the reported TMDCs‐based FGFET memories. Typical device exhibits large memory windows of ≈11.5 and 2.8 V and on/off ratios of ≈10 4 and 10 3 in gate voltage sweep ranges of ±10 and ±5 V, respectively, with long retention time of more than 10 5 s and good stress endurance of more than 5 × 10 4 programming/erasing cycles. The conductance of the device can be precisely tuned by applying short potentiative and depressive ±5 V voltage pulses. The device yields are 100% and 93% under ±10 and ±5 V, respectively. The whole fabrication process is free from the transfer process and compatible with traditional silicon technology. This work paves the way for the application of TMDCs in large‐scale integrated circuits.

Advanced Electronic MaterialsVol. 11(3)
Peking University (CN), Collaborative Innovation Center of Quantum Matter (CN)
National Natural Science Foundation of China, National Key Research and Development Program of China
Openalex Percentile: Top 34%
2D Materials and Applications
0.59
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