Design Points of InGaAs MFMIS Tunnel FET for Large Memory Window and Stable Ferroelectric Memory Operation
We study device structures and their design points of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\text{HfZrO}}_{X}$ </tex-math></inline-formula>-based InGaAs metal-ferroelectric–metal-insulator–semiconductor (MFMIS) ferroelectric tunnel FETs (Fe-TFETs) based on ferroelectric (FE) polarization-controlled band-to-band tunneling (BTBT) for stable nonvolatile memory (NVM) operation. We monolithically integrated a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\text{HfZrO}}_{X}$ </tex-math></inline-formula> MFM capacitor into the baseline tunnel field-effect transistor (TFET), which has steep subthreshold swing (SS) characteristics of sub-60 mV/decade with a HfO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> gate-stack, compared to the reference MOSFET. We found temperature-stable NVM behaviors of the InGaAs Fe-TFET compared to the InGaAs ferroelectric MOSFETs (Fe-MOSFETs) at the measurement temperature range from -20 °C to 85 °C. Furthermore, we explored the scaling effects of the MFMIS structure using a high-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\kappa }$ </tex-math></inline-formula> HfO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate insulator layer to pursue a steep SS, and a large capacitance ratio between the dielectric (DE) and FE capacitors. The InGaAs MFMIS-structure Fe-TFET achieves stable retention over 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s and excellent endurance during 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles at the DE/FE capacitance ratio of 27.5.
Authors
- Dae-Hwan Ahn (ORCID: https://orcid.org/0000-0001-5000-0728)
- Byeong‐Kwon Ju (ORCID: https://orcid.org/0000-0002-5117-2887)
- Kyul Ko
- Jae‐Hoon Han (ORCID: https://orcid.org/0000-0003-3575-9140)
- Jai-Youn Jeong
Institutions
- Korea University (KR)
- Korea Institute of Science and Technology (KR)
- Korea Institute of Science & Technology Information (KR)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2024-08-30
- DOI
- https://doi.org/10.1109/ted.2024.3449255
- Citations
- 4
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.83
Funders
- National Research Foundation of Korea