Modeling and Analysis of Parasitic Parameters of Through-Glass Vias With Various Tapers and Sidewall Roughness

In this study, an electrical modeling approach for parasitic parameters of nonuniform through-glass vias (TGVs) is proposed, which effectively captures both the profiles and sidewall roughness. The investigation systematically derives and analyzes parasitic parameters across various profiles and sidewall roughness conditions. Utilizing a Gaussian distribution function to approximate the binomial distribution of sidewall roughness, the integration over positive and negative three standard deviations yields a more precise method for calculating parasitic parameters in nonuniform TGVs. The findings underscore that an increased taper of the TGV intensifies the impact of sidewall roughness on parasitic inductance and parasitic resistance. Simultaneously, it mitigates parasitic capacitance and parasitic conductance. Hyperbolic TGVs are notably prominent in exacerbating parasitic internal inductance and resistance. Notably, comparative analyses reveal a substantial surge in parasitic internal inductance at higher frequencies, potentially dominating the inductance of the entire loop. Furthermore, the study meticulously validates the experimental results, comparing them with calculated and simulated outcomes to confirm the validity and accuracy of the proposed electrical model up to 40 GHz.