Low-temperature epitaxial SiGe:P for gate-all-around n-channel metal-oxide-semiconductor devices
Abstract This study investigates the viability of Si 1− x Ge x :P ( x ≤ 0.3) as a novel source/drain material for n-channel Metal-Oxide-Semiconductor for Gate-All-Around (GAA) transistors, addressing the challenges posed by the evolving semiconductor technology. Utilizing a reduced-pressure chemical vapor deposition system, undoped SiGe with low Ge contents were grown at temperatures of ≤500 °C. The addition and optimization of phosphorous doping using phosphine results in improved surface morphology and increased active carrier concentration. The study compares Si 1− x Ge x :P with different silicon precursors and temperatures, emphasizing the potential for maintaining high growth rates at lower temperatures when using Si 3 H 8 . Ti/Si 1− x Ge x :P stacks reveal a promising reduction in contact resistivity with decreasing the Ge content, particularly when incorporating thin Si:P cap layers at the Ti/Si 1− x Ge x :P interface. This comprehensive study highlights the potential of Si 1− x Ge x :P as an alternative material for advanced GAA transistor technologies, offering improved mobility and meeting the thermal budget requirements.
Authors
- Roger Loo (ORCID: https://orcid.org/0000-0003-3513-6058)
- Clément Porret (ORCID: https://orcid.org/0000-0002-4561-348X)
- Yuta Fujimoto
- Erik Rosseel (ORCID: https://orcid.org/0000-0002-2737-8391)
- Andriy Hikavyy (ORCID: https://orcid.org/0000-0002-8201-075X)
- Gianluca Rengo (ORCID: https://orcid.org/0000-0002-3410-6466)
Institutions
- Soitec (France) (FR)
- Sony (Taiwan) (TW)
- Imec the Netherlands (NL)
- IMEC (BE)
Publication Details
- Journal
- Japanese Journal of Applied Physics
- Published
- 2024-08-30
- DOI
- https://doi.org/10.35848/1347-4065/ad75da
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00