Low-temperature epitaxial SiGe:P for gate-all-around n-channel metal-oxide-semiconductor devices

Abstract This study investigates the viability of Si 1− x Ge x :P ( x ≤ 0.3) as a novel source/drain material for n-channel Metal-Oxide-Semiconductor for Gate-All-Around (GAA) transistors, addressing the challenges posed by the evolving semiconductor technology. Utilizing a reduced-pressure chemical vapor deposition system, undoped SiGe with low Ge contents were grown at temperatures of ≤500 °C. The addition and optimization of phosphorous doping using phosphine results in improved surface morphology and increased active carrier concentration. The study compares Si 1− x Ge x :P with different silicon precursors and temperatures, emphasizing the potential for maintaining high growth rates at lower temperatures when using Si 3 H 8 . Ti/Si 1− x Ge x :P stacks reveal a promising reduction in contact resistivity with decreasing the Ge content, particularly when incorporating thin Si:P cap layers at the Ti/Si 1− x Ge x :P interface. This comprehensive study highlights the potential of Si 1− x Ge x :P as an alternative material for advanced GAA transistor technologies, offering improved mobility and meeting the thermal budget requirements.

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Publication Details

Journal
Japanese Journal of Applied Physics
Published
2024-08-30
DOI
https://doi.org/10.35848/1347-4065/ad75da
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
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article

Low-temperature epitaxial SiGe:P for gate-all-around n-channel metal-oxide-semiconductor devices

Roger Loo, Clément Porret, Yuta Fujimoto, Erik Rosseel et al.
Japanese Journal of Applied Physics
Advancements in Semiconductor Devices and Circuit Design
article

Low-temperature epitaxial SiGe:P for gate-all-around n-channel metal-oxide-semiconductor devices

Roger Loo, Clément Porret, Yuta Fujimoto, Erik Rosseel, Andriy Hikavyy, Gianluca Rengo
article en

Abstract

Abstract This study investigates the viability of Si 1− x Ge x :P ( x ≤ 0.3) as a novel source/drain material for n-channel Metal-Oxide-Semiconductor for Gate-All-Around (GAA) transistors, addressing the challenges posed by the evolving semiconductor technology. Utilizing a reduced-pressure chemical vapor deposition system, undoped SiGe with low Ge contents were grown at temperatures of ≤500 °C. The addition and optimization of phosphorous doping using phosphine results in improved surface morphology and increased active carrier concentration. The study compares Si 1− x Ge x :P with different silicon precursors and temperatures, emphasizing the potential for maintaining high growth rates at lower temperatures when using Si 3 H 8 . Ti/Si 1− x Ge x :P stacks reveal a promising reduction in contact resistivity with decreasing the Ge content, particularly when incorporating thin Si:P cap layers at the Ti/Si 1− x Ge x :P interface. This comprehensive study highlights the potential of Si 1− x Ge x :P as an alternative material for advanced GAA transistor technologies, offering improved mobility and meeting the thermal budget requirements.

Japanese Journal of Applied PhysicsVol. 63(9)
Soitec (France) (FR), Sony (Taiwan) (TW), Imec the Netherlands (NL), IMEC (BE)
Industry, innovation and infrastructure
Openalex Percentile: Top 88%
Advancements in Semiconductor Devices and Circuit Design
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